1. Field of the Invention
The present invention relates to mounting of printed circuit board assemblies and more particularly concerns a supporting cage for edge connected stacks of printed circuit board and frame assemblies that facilitates direct edge to edge connection of two stacks of boards and frames in mutually perpendicular planes.
2. Description of Related Art
As functions and operations of electronic equipment expand in scope and complexity, greater amounts of circuitry are necessarily employed. Circuit boards become larger and increased numbers of such boards are used. For example, very large capacity computers which embody massive parallel processing of data and massive parallel computational operations and some telephone switching circuits for distribution of video and information systems for household use may employ large numbers of identical or nearly identical circuits. Often, groups of similar or identical circuits are mounted on each of a large number of circuit boards that are packaged in a group. In a common type of multi board packaging arrangement, boards of a first group of mutually parallel daughter boards are positioned in parallel planes that are perpendicular to one side of a mother board, and a second group of such parallel daughter boards lie in planes perpendicular to the opposite side of the mother board. System operation requires the ability to interconnect circuits on one daughter board to circuits on another daughter board. The mother board is provided to afford such interconnections. Thus, a circuit on one daughter board is connected to a circuit on a second daughter board by a connection between the first daughter board and the mother board, appropriate circuitry in the mother board, and a connection between circuitry of the mother board and the second daughter board. Such arrangements require complex and costly termination processes and hardware for interconnection of the daughter boards to the mother board. Importantly, length and impedance of the circuit path between the two interconnected daughter boards varies depending upon the location of the daughter boards with respect to one another and with respect to the interposed mother board. The path length of the connection between two daughter boards depends to a large extent upon the length of the interconnection path that is provided within the interposed mother board itself. Such varying path lengths introduce varying impedance and varying timing, so that it may be necessary in some cases to introduce compensating timing circuits that account for differences in the time required for signals to traverse different ones of the circuit paths that interconnect daughter boards. Further, such daughter boards often carry electrical power and fiber optic input/output connectors on back edges, requiring various connections to be made to the board at locations widely separated on the board from the electrical data signal connectors. Moreover, the required use of the interposed mother and its circuits adds further to cost and complexity of the assembly.
To avoid problems such as these it has been suggested, as set forth in the co-pending patent application of Felix M. Oshita, Ronald L. Campbell and Theodore R. Conroy-Wass for Hermaphroditic Interconnection of Circuit Boards, Ser. No. 07/801,977, Filed Dec. 3, 1991 and assigned to the assignee of the present application, board edges are provided with hermaphroditic connector nodes to enable the daughter boards to be connected directly to one another in an edge to edge relation. Such a configuration provides significant advantages in the compact interconnection of large numbers of circuit boards. However, it is necessary to provide a support structure for two stacks of boards that optimizes advantages derived from the edge to edge hermaphroditic interconnection of stacks of boards.
Therefore, it is an object of the present invention to provide a cage for mounting stacks of circuit board that is specifically designed for use in a system wherein two stacks of circuit boards are interconnected in edge to edge relation.